1. Field of the Invention
The present invention relates to a transmit-receive module used for a phased array radar which is an electronic control antenna.
2. Description of the Prior Art
FIG. 16 is a block diagram of an existing phase-scanning phased array radar, FIG. 12 is a block diagram of an existing transmit-receive module which may be used in the phased array radar of FIG. 16, FIG. 13 is a schematic of a field effect transistor amplifier which may be used in the transmit receive module of FIG. 12, FIG. 14 is a schematic of a single-pole double-throw field effect transistor switch which may be used in the transmit receive module of FIG. 12, and FIG. 15 is a schematic diagram of a loading-type field effect transistor phase shifter which may be used in the transmit-receive module of FIG. 12.
In FIG. 12, numeral 1 is a digital phase shifter for varying the phase of RF signals according to a digital input, 2a and 2b are duplexers for switching between a transmit and receive propagation path for RF signals, 3 is a high-power amplifier for amplifying transmission RF signals up to a predetermined level, 4 is a low-noise amplifier for amplifying received signals at a low noise, 5 is a control circuit for outputting predetermined phase setting signals 12 in accordance with external control signals 10, 6 is a level conversion circuit for converting output signals 12 of the control circuit 5 to an output voltage 13 for driving the digital phase shifter 1, duplexers 2a and 2b, high-power amplifier 3, and low-noise amplifier 4. Numeral 7 is a transmit-receive module comprising the above devices. Numeral 8 is an element antenna for emitting transmission waves into space and receiving radio waves from space. Numerals 9a and 9b are input/output terminals for RF signals, terminals 10.sub.1, 10.sub.2, . . . and 10.sub.1 are control signal input/output terminals for feeding external control signals to the transmit-receive module 7 and sending the signals of the transmit-receive module 7 to the outside. Terminals 11.sub.1, 11.sub.2 . . . , and 11.sub.j are external power input terminals.
In FIG. 13 there is shown a schematic diagram of an amplifier which may be used as the high-power amplifier 3 or the low-noise amplifier 4 of FIG. 12. Numeral 21 is a field effect transistor. Numerals 22a 22b are inductors, which together with the capacitors 23a and 23b constitute bias circuits 24a and 24b. Numerals 25a and 25b are DC preventing capacitors, 26 is a RF signal input terminal, 27 is an RF signal output terminal for outputting RF signals amplified by the field effect transistor 21, 28a and 28b are resistors which together comprise a bias voltage resistance 29. Numeral 30 is a drain voltage applying terminal, 31 is a negative gate voltage applying terminal, and 32 is a pulse voltage applying terminal for pulse-driving the field effect transistor 21. A problem with the amplifier design according to the prior art is that, for an N-type field effect transistor 21, the gate terminal 31 can only be driven with a negative voltage in order to control the transistor 21.
The single-pole, double-throw (SPDT) switch of FIG. 14 may be used as the duplexers 2a and 2b of the module of FIG. 12. Numerals 33a and 33b are field effect transistors, 34a and 34b are inductors chosen to create a parallel resonance with a capacitor between a drain and source of the field effect transistors 33a and 33b when the field effect transistor is turned off, 35a and 35b are resistors for biasing the gate voltage of the field effect transistors 33a and 33b, 36 is an RF choke inductor, 39 is an RF signal input terminal, 40a and 40b are RF signal output terminals, and 41a and 41b are gate voltage applying terminals for applying the gate voltage to the gate of the field effect transistors 33a and 33b to turn the transistors on or off. A problem with the SPDT switch of the prior art is that, for an N-type field effect transistor, the gate terminals 41a and 41b can only be driven with a negative voltage in order to control the transistors 33a and 33b.
The phase shifter of FIG. 15, may be used as the phase shifter 1 in the transmit-receive module of FIG. 12. Numerals 33c and 33d are field effect transistors, 35c and 35d are resistances for biasing the gate voltage of the field-effect transistors 33c and 33d, 41c and 41d are gate voltage applying terminals for applying the gate voltage to the field-effect transistors 33c and 33d to turn them on or off, 43 is 1/4 wavelength transmission line, 44a and 44b are impedance conversion transmission lines for converting the input impedances of the field-effect transistors 33c and 33d into impedances for obtaining a desired phase shift, and 46a and 46b are RF signal input/output terminals. Similarly, a problem with the phase shifter design of FIG. 15 is that, for an N-type field effect transistors the gate terminals 41c and 41d can only be driven with a negative voltage in order to control the phase shifter.
In the phase scanning phased array radar of FIG. 16 numeral 16 is an exciter for generating RF signals. Numeral 17 is a receiver for processing received RF signals. Numeral 18 is a circulator for switching the propagation paths of transmission and received signals. Numeral 19 is a power supply source for feeding a predetermined supply voltage to the transmit-receive modules 7.sub.1, 7.sub.2 . . . , and 7.sub.N. Numeral 20 is a beam oriented control circuit for outputting phase shift data to the transmit-receive modules 7.sub.1, 7.sub.2, . . . 7.sub.N so as to form antenna beam patterns. Numeral 47 is an RF signal synthesizing/distributing circuit for distributing RF signals output by the exciter 16 to transmit-receive modules 7.sub.1, 7.sub.2, . . . , and 7.sub.N and for synthesizing signals received from the transmit-receive modules 7.sub.1, 7.sub.2 . . . , and 7.sub.N. Numeral 48 is a supply voltage feed circuit for feeding the supply voltage output by the power source 19 to the transmit-receive modules 7.sub.1, 7.sub.2, . . . , and 7.sub.N. Numeral 49 is a control signal distributing circuit for feeding the data output by the beam oriented control circuit 20 to the transmit-receive modules 7.sub.1, 7.sub.2, . . . , and 7.sub.N and collecting the data output by the transmit-receive modules 7.sub.1, 7.sub.2, . . . , and 7.sub.N to the beam oriented control circuit 20.
The following is the description of the phased array radar's operation. RF signals 100 generated by the exciter 16 are fed to the transmit-receive modules 7.sub.1 to 7.sub.N through the RF signal circulator 18 and RF signal synthesizing/distributing circuit 47. Referring to FIG. 12, the RF signals are input to each T/R module at input 9a where they pass through the digital phase shifter 1 where the signal is shifted in phase by a predetermined phase setting before the signal is fed to the high-power amplifier 3 which is selected with the duplexer 2a, the signal is then amplified up to a predetermined level, and emitted into space through the RF signal input/output terminal 9b and antenna element 8.
A radio wave incoming from space is received by the antenna element 8 and input to the low-noise amplifier 4 via the aid of duplexer 2b, amplified up to a predetermined level at low noise levels, fed to the digital phase shifter 1 via the aid of the duplexer 2a, where it is provided with a predetermined phase shift and output to the receiver 17 through the RF signal input/output terminal 9a via the RF signal synthesizing/distributing circuit 47 and circulator 18 as best shown in FIG. 16, and thereafter detected as a received signal 101.
The predetermined settings of the RF devices 1 to 4 are controlled by a supply voltage 102 output by the power source, 19 in FIG. 16, and fed to the supply voltage input terminals 11.sub.1 to 11.sub.j of the T/R module as shown in FIG. 12 via the supply voltage feed circuit 48. The control data signal 103 output by the beam oriented control circuit 20, in FIG. 16, is fed to the control signal input/output terminals 10.sub.1 to 10.sub.I of the T/R module as shown in FIG. 12 through the control signal distributing circuit 49. Referring to FIG. 12, the control data signals 103 fed to the control signal input/output terminals 10.sub.1 to 10.sub.1 are fed to the control circuit 5 where they are provided with predetermined values and timing settings before they are output as parallel signals 12.sub.1 to 12.sub.K. These signals are input to the level conversion circuit 6 where they are converted into the appropriate supply voltage level needed for actually driving the RF devices 1 to 4, and output as driving signals 13.sub.1 to 13.sub.L , which are fed to the RF devices 1 to 4. The bias supply voltage signals input to the supply voltage input terminals 11.sub.1 to 11.sub.j are fed to the devices 1 to 6 to make each device ready for operation.
As discussed above with respect to the phase-shifter, the SPDT switches and the amplifier of the prior art, a problem with the prior art embodiment of the transmit-receive module is that the level conversion circuit 6 is needed to transform the signals 12 into appropriate levels to drive the RF devices of the prior art.
Because the existing transmit-receive module is constituted as described above, there is a problem in the size and the power consumption of the level conversion circuit 6 required for level conversion of the control signals input to the individual T/R modules because it is necessary to convert each of the parallel signals 121 to 12.sub.K into a suitable supply voltage for actually driving the RF devices. Moreover, a phased array radar comprising a plurality of transmit-receive modules operating at high frequencies and coupled with a conformal antenna array, requires that the size of the transmit-receive modules be reduced. However, the size of the level conversion circuit 6 together with the control signal input/output connector and supply voltage connector inhibit the down sizing of the transmit-receive module.